SAP-2

In-class exercise from Oct 22

to detect whether a number is a power of two, AND it with itself after subtracting 1 -- if the result is zero, the number is a power of two.
assuming you read a byte from an input device where each bit has an independent meaning, how do you determine which bit(s) are set?

On the SAP-1, and most other processors, the blocks (registers, ALU, or memory) are controlled using microcode
each signal has an unasserted value and an asserted (opposite) value
on each clock cycle, certain signals must be asserted: for example, one block is typically Enabled onto the bus, and one other (or, rarely, more than one) reads/loads its contents from the bus
the signals for each clock cycle executing a (macro-)instruction are produced by logic or by a ROM
the collection of signals for a single clock cycle is a word of this ROM, usually called a microinstruction
the collection of microinstructions to implement all the macroinstructions is called the microcode
example from homework 10-8

in order to get the right microinstruction on the ROM outputs at the right time, the ROM must be given the correct address
most microinstructions are executed in sequence, e.g. the 3 microinstructions of the SAP-1 fetch cycle, and the 3 microinstructions of each macroinstruction's execution cycle
sometimes, the next microinstruction depends on some other values, e.g. on the value in the instruction register
an additional ROM, the address ROM, can be used to provide the starting address, which is loaded into a counter
the counter is cleared at the beginning of instruction fetch, and loaded at the end of T3
more arbitrary sequences can also be supported by letting a few bits of each microinstruction be used to specify the address of the next microinstruction

2 flip flops, sign flag and zero flag
set during arithmetic and logic operations to reflect final accumulator contents
JM jumps only if the sign flag is set (minus result)
JZ jumps only if the zero flag is set (zero result)
JNZ jumps if the zero flag is clear (non-zero result)
what is the value of the sign bit if the accumulator contents are zero?

work in groups of up to 3
design a circuit to implement the flags
inputs are: 8 bits from the accumulator, clock (use the positive-going edge), 1 L_F control line (active high)
outputs are the flags: Z_F, S_F

SAP-2 memory is 8 bits wide
some instructions, e.g. MVI, CALL, take up to 3 bytes
PC keeps incrementing until the entire instruction is in IR/TMP/MAR
one memory cycle is needed for each byte
a CALL instruction stored beginning at location 0x1234 must put which return address into the reserved memory location?
relative jumps transfer control so many locations before or after (e.g. jump +32). The reference for the addition is the first (or sometimes the last) byte of the instruction

what does the SAP-2 miss that belongs in a more complete microprocessor? How would you improve it? How much would that cost?