Registers
- Buffer registers
- Shift registers
- Controlled shift registers
- Three-state registers
- Buses
Buffer Register
- buffer -- can drive more loads than a regular TTL circuit can
(already seen in project 2)
- register -- stores data
- a series (row) of D flip-flops, all clocked together
- on the rising edge of the clock the outputs, Q, store the
inputs, X
- how can we control the loading? In other words, we wish to only
load when an external signal tells us to load, and holding the value otherwise.
Controlled Register
- have a multiplexer (two ANDs and an OR) on each input
- if LOAD is high, load the D flip-flop from the outside input
- if LOAD is low, load the D flip-flop from its own output
- Simple-As-Possible computer (SAP-1): output register built from
to 74LS173 circuits, drives LEDs (figure 8-3 p. 107)
Shift Registers
- feed the output of each D flip-flop into the input of
the next flip flop to the left
- on each clock cycle, the word moves left
- for example if the rightmost input is 1 and the word in the
register is 1110 0011, after one clock cycle the word in
the register is 1100 0111
- right shift is similar
- arithmetic: multiplication, division by two
- serial adder: add one bit at a time from two shift registers,
place result back into one of the shift registers (or another shift
register)
Controlled shift registers
- one control line, SHL (or SHR)
- multiplexer on input to D flip-flop
- when SHL is high, load from the flip-flop to the right
- when SHL is low, load from our own output
- LSB (least significant bit) loads from the one-bit input
- figure 8-7 p. 109
In-Class Exercise
- work alone or with 1 other person
- 10 minutes
- design a shift register that will do all of the following:
- if LOAD is high, loads from the inputs
- if LOAD is low, and SHIFT is high, then:
- if LEFT is low, shift right
- if LEFT is high, shift left
- if both LOAD and SHIFT are low, hold the data
- draw a circuit diagram of one bit slice of this shift register.
Three-state outputs
- The only way we've seen to combine outputs is through gates (e.g.
multiplexers)
- it would be nice to be able to connect circuits (e.g.,
registers) together on a bus, and only one circuit would be enabled at
a time: that circuit would write onto the bus, all others can read it
- a three-state output has three possible states: 0, 1, and "off"
(high impedance, equivalent to high resistance)
- when a three-state output has high impedance, it neither sinks
nor sources current.
Bus organization
- a single bus can connect all the inputs and all the outputs of
all the registers
- when we want to read from a register, we raise the ENABLE
line for that register to tell its three-state outputs to leave
the high-impedance state
- we only ENABLE one register at a time, or we'd have
multiple outputs driving the same line, leading to unpredictable (and
possibly damaging) results
- when we want to write to a register, we raise its LOAD
control line