Overview

SAP-2

opcode is always one byte
for some instructions, opcode is followed by one or two bytes, always in little-endian order (LSB first)
different number of clock cycles for each instruction, minimum 4
2K ROM for boot program, up to 62K RAM (16-bit addresses) with read and write
jump instructions, CALL, RET
multiple input and output ports
16 bit PC, 8 bit arithmetic
flags
bidirectional registers

some instructions are very complex
e.g. CALL on SAP-2 stores PC to fixed memory locations, then loads PC with new value (loaded from memory into tmp register):
- get opcode into IR, address into tmp
- store PC low into FFFE
- store PC high into FFFF
- copy tmp into PC
many T states (18 for CALL on SAP-2)
instruction is implemented by enabling certain components on each T state
the collection of control signals to enable/disable all components is the microcontrol word
collection of microcontrol words for all the instructions forms the CPU's microprogram
microcode is a complex combinatorial function of T state and instruction and internal CPU state, so can be implemented as:
- digital logic, or
- ROM, or
- other techniques such as PAL/PLA (Programmable Array of Logic/Programmable Logic Array)

more flags, more registers, more arithmetic: be familiar enough to understand all arithmetic opcodes and what they do, be familiar with all the flags
indirect addressing using HL
stack, stack pointer, and stack instructions, including CALL and RET

the study of how to design computers
some things of interest:
- programming model: what registers, what operations, what memory
- overall computer organization: memory (or memories), cache(s), internal busses, external busses
- sizes of everything (bus, registers, ALUs, etc), in bits: cost vs performance
a good way to study computer architecture is to study processors that have been built in the past, to see what lessons we can learn from them
processors generally belong to processor families, with identical/similar instruction sets and programming models

effective address: the place in memory where the operand is stored (if EA is a register, actual location not specifiable using memory address)
immediate addressing: EA = PC+1 (if operand is one byte)
direct addressing: EA = (PC+1), i.e. the address is stored in the bytes following the opcode
register/implicit addressing: EA = register
if the page is given, fewer bits are needed to identify the location. E.g. zero-page, stack page
segment addressing: fewer bits in an address, as long as all addresses are within one segment

jump: unconditional or conditional, loads the PC from the given value, usually found in the instruction stream
call: push next-PC, then jump
ret: pop into PC
wait: stop executing instructions, allow interrupts
nop
transfer from register or memory to register or memory

on a CALL, we need not push registers that the callee saves or doesn't use -- callee-save registers
on a thread switch, we must save ALL registers
on an interrupt, we must save ALL registers we use (all registers are callee-save)
the stack pointer then provides all information needed to restart the processor: the continuation
the thread that was interrupted will not know it was interrupted
other threads may be run before this thread is restarted

the processor could check its inputs all the time, which is resource intensive, tedious, and error prone
instead, a line is checked before each instruction execution
if the line is active, the interrupt handler is invoked, after saving the current PC
on machines with supervisory mode(s), the interrupt handler usually runs with the highest privilege
RETI similar to RET, may restore more registers automatically

must make choices given tradeoffs among cost and speed (the things that most seem to matter to a customer)
may also want binary compatibility, assembly-level compatibility, or (easiest) source code compatibility
number of bits limits (a) native arithmetic, (b) addressable memory