Addressing Modes

• pages
• segments
• simple addressing modes
• 6502 addressing modes
• 6800 addressing modes
• 8080 addressing modes
• 8086 addressing modes
• CPU control instructions
• 6502 data transfer instructions
• 6800 data transfer instructions
• 8080 data transfer instructions

Pages

• blocks of 256 bytes (in microprocessors -- can be larger in workstations)
• a page is addressed with only one byte
• the rest of the address is the page number
• for example, page 0 (zero page) has all locations 0x0000...0x00ff
• 6502, 6800 use pages

Segments

• Unix has stack segment, code (text) segment, data segment, heap segment
• a few segment registers can keep track of permissions (no writing into code segment), accesses (stack overflow) etc
• if we only have 16-bit addresses, segments can make that 64K bytes/segment
• can move to a different segment (up to 64KB) by loading a different 16-bit value into a segment register
• x86 uses segments

x86 Segments

• x86 has near pointers, which use the same value in the segment register, and far pointers which reload the segment register
• different segment registers are implicitly used for different operations e.g. the stack segment for all stack operations
• in a small machine, we don't have to use the segment registers, and all our addresses are 16 bits

Addressing Modes

• Implied: address is implied by the instruction (eg TAX)
• Register: register is specified by the instruction (eg MOV A,B)
• Immediate: value is specified after opcode (eg LDAA #$13)
• Direct/Absolute: value is in memory address specified after opcode (eg LDA (89AB))
• more addressing modes (indirect, indexed, etc) in Chapter 21

6502 addressing modes

• implied: e.g. TAX (transfer register A to register X)
• register/accumulator addressing: ASL (arithmetic shift left A)
• immediate addressing: LDA #$13 (load A with the value 13)
• zero page (direct) addressing: LDA $13 (load A from location 13)
• absolute (direct) addressing: LDA $1234 (load A from location 1234)

6800 addressing modes

• implied: TAB (transfer register A to register B)
• no real register/accumulator addressing (considered implied addressing)
• immediate addressing: LDAB #$13 (load A with the value 13)
• direct addressing: LDAB $13 (load A from location 13)
• extended (direct) addressing: LDAB $1234 (load A from location 1234)

8080 addressing modes

• implied: STC (set carry flag)
• register addressing: MOV A,B (copy the contents of B to A)
• immediate addressing: MVI A,13H (load A with the value 13)
• direct addressing: LDA 1234H (note: in the machine code the low byte precedes the high byte of the address)

x86 addressing modes

• implied: NOP
• register addressing: MOV BX,CX (copy the 16-bit contents of C to B)
• immediate addressing: MOV AL,13H (load the low-order 8 bits of A with the value 13)
• direct addressing: MOV DL, [1234H] (uses the data segment register), JMP 100 (uses the code segment)

CPU Control Instructions

• 6502: NOP, BRK
• 6800: NOP, WAI (wait for interrupt)
• 8080/8085/Z80: NOP, HLT/HALT
• 8086: NOP, HLT, WAIT

Data Transfer Instructions: 6502

• LDA, LDX, LDY: immediate, absolute, zero page, indexed indirect, indirect indexed, zero page indexed, absolute indexed by X or Y (no indexing for LDX, LDY)
• STA, STX, STY: absolute, zero page, indexed indirect, indirect indexed, zero page indexed, absolute indexed by X or Y (no indexing for STX, STY)
• TAX, TXA, TAY, TYA

Data Transfer Instructions: 6800

• 8-bit loads: LDAA, LDAB: immediate, direct, indexed, extended
• 8-bit stores: STAA, STAB: direct, indexed, extended
• 8-bit clear: CLR (indexed, extended), CLRA, CLRB
• 16-bit load: LDX: immediate, direct, indexed, extended
• 16-bit store: STX: direct, indexed, extended
• TAB, TBA

Data Transfer Instructions: 8080/8085

• MOV: used for all moves, but different opcodes for:
  • register-to-register (8-bit, all combinations; 16-bit, exchange DE and HL)
  • memory-to-register (memory identified by HL; memory identified by absolute address)
  • register-to-memory (memory identified by HL; memory identified by absolute address)
  • immediate-to-register
• very comprehensive (many registers) but not completely orthogonal (some operations only apply to AX, BC, DE, or HL)