Frames and Errors

Sampling and Quantization -- continued

assume a slow link is shared among several pairs of computers
if one computer (pair) is transferring a large file over the link, the transfer will take a long time
how could the others use the link at the same time?
use time-domain multiplexing: break each transfer into packets with a given maximum size (e.g. 1024 bytes), and transfer packets from each sender in turn
the big sender sees less effective bandwidth,
but the latency for the others is much better

assume we have a way of sending and receiving bits and bytes
how would we send a packet?
in other words, at the receiver, given a real-time sequence of bytes, how do we know (in real-time) where a packet starts and ends?
answer: use a special character (e.g. 255) to mark the start of the packet, another (e.g. 254) to mark the end

Serial Line IP protocol: carries IP packets on serial lines
two special characters: END and ESCape
END marks the end of a packet (and the start of the next)
Note that in SLIP there is no need to mark the start of a new frame...
data may contain the special characters:
- if the data byte is END, we send ESC END
- if the data byte is ESC, we send ESC ESC
predefined maximum user data size, 1024 bytes
RFC 1055, http://www.ietf.org/rfc/rfc1055.txt

SLIP is an example of byte stuffing:
- reserve one or more characters for marking beginning and end
- if the character occurs in the data, escape it
some protocols use bit stuffing as well. For example, some protocols use 5 ones in a row to mark a special case
- If the data contains 4 ones in a row, a zero is always inserted after those 4 bits
- the receiver always removes a zero following 4 ones
- the receiver can tell the special case when it receives 5 ones in a row
- examples:
  - 1101 1011 0001 is the code for: 1101 1011 0001
  - 1101 1111 0001 is the code for: 110, special mark, 0001
  - 1101 1110 1001 is the code for: 1101 1111 001
- in-class exercise: encode 1111 0000 1111 1101

bit errors: errors that have an equal likelihood of being equally distributed among all the bits in a message
burst errors: errors that are more likely to corrupt bits near other errors
if I have a bit error rate b, and there are P bits in a packet, my packet error rate (likelihood of at least one error in a packet) is about (1 - b)^P
note that if Pb << 1, then
(1 - b)^P is approximately Pb
for example, if b = 10^-12, and P = 10000 bits, then the packet error rate is approximately 10^-7
in-class exercise: compute the packet error rate when the bit error rate is 10^-9 and each packet carries 125 bytes (no calculators)

Error pattern: say I send 0101010101 and receive 0101100101
the XOR of the two is the error pattern, in this case 0000110000
the error pattern has a one for every position where there is a bit error, and a zero where the data was transmitted correctly
the error pattern is hard to compute in most real cases, since we have either the data we send or the data we receive, but not both
the error pattern is used to mathematically analyze errors and error-correction schemes

one way to detect all single-bit errors is to compute the XOR of all the bits in the message, and send that bit: this is the even parity bit
a single bit error will change the message so the parity is no longer correct
the (boolean) inverse of even parity is odd parity
RS-232 allows the configuration of even, odd, or no parity bit
when parity is configured, an additional parity bit is sent with each character
but double-bit errors (actually, any error with an even numbers of bits) will not be detected

if we add all the bytes in the message
and send the sum,
the receiver can repeat the operation and detect most errors
unless one error adds, and one subtracts the same amount
Internet checksum:
- add all 16-bit words in the message,
- add any 16-bit carry back in
- invert before sending
- receiver should compute 0xFFFF or 0x0

message:

45 00 10 20 AF CD 00 01 FF 06 00 00 80 AB 0A 01 80 02 4F 5B

sum (in hex):

55 20 + 
AF CD 
=====
04 ED (carry 1)

04 ED (carry 1) +
00 01
=====
04 EE (carry 1)

04 EE (carry 1) +
FF 06
=====
03 F4 (carry 2)

03 F4 (carry 2) +
00 00
=====
03 F4 (carry 2)

03 F4 (carry 2) +
80 AB
=====
84 9F (carry 2) +

84 9F (carry 2) +
0A 01
=====
8E A0 (carry 2)

8E A0 (carry 2) +
80 02
=====
0E A2 (carry 3)

0E A2 (carry 3) +
4F 5B 
=====
5D FD (carry 3)

add the carry back in:

5D FD
00 03 
=====
5E 00

invert the result:

A1 FF

in-class exercise: compute the checksum of the following packet:
```
45 00 10 20 AF CD 00 01 FF 06 A1 FF 80 AB 0A 01 80 02 4F 5B 
```
in-class exercise: compute and verify the checksum of the following packet:
```
12 34 56 78 9A BC DE
```

Cyclic Redundancy Check (Peterson, 1962)
used for networks, storage media
a class of error control codes
mathematically designed to detect all single-bit errors, all double-bit errors, and most multi-bit and burst errors
defined by a polynomial with binary (0 or 1) coefficients
example: x³² + x²⁶ + x²³ + x²² + x¹⁶ + x¹² + x¹¹ + x¹⁰ + x⁸ + x⁷ + x⁵ + x⁴ + x² + x + 1 (Ethernet, ATM)
example: x⁸ + x² + x + 1 (ATM)

the highest exponent of the polynomial is the number of bits in the CRC
the message is (logically) processed one bit at a time
logically, there is a shift register with a bit for every exponent of the polynomial

where the polynomial has a non-zero coefficient, we XOR the MSB of the shift register with the output of the corresponding bit of the shift register before shifting into the next position
the final value in the register is the CRC: it is inverted and sent
the receiver performs the same calculation and gets zero if there was no error