ICS 331
Logic Design and Microprocessors

The instructor is Edo Biagioni. Office hours are in POST 303B, Monday 11am-12noon and Thursday 3pm-4pm, or by appointment.

The TA for this course is Preeti Pathak.

This course meets MW 12:00-1:15 in Ocean 114. There is also a lab, open MW 1:30 to 2:45, W 6 to 8, and F 11:30 to 1:30, in Holmes Hall 451. The TA will be at the lab for at least the first 30 minutes after the lab opens, and will leave if nobody shows up during that time. E-mail Preeti if you want to make other arrangements.

The textbook for this course is Malvino's "Digital Computer Electronics", 3rd edition (1992). You may also want to look at this microprocessor page.

Schedule

1. Mon Jan 10. Course overview and Introduction. Chapter 1.
   Notes
   Materials covered:
   • course overview
   • introduction to number systems
2. Wed Jan 12.
   Notes
   Materials covered:
   • digital hardware basics:
     • resistors and LEDs
     • Ohm's law
     • transistors and switches
     • voltages as bits
     • magnetic cores
     • punched cards, magnetic tape
   • Hexadecimal numbers (Hex)
   • Binary-Coded Decimal (BCD)
   • ASCII
   Homework 1 assigned, due Wed. January 19th.
3. Wed Jan 19. Gates, boolean algebra.
   Notes
   Materials covered:
   • digital hardware basics:
     • transistor gates (continued)
     • magnetic cores
     • punched cards, magnetic tape
   • Hexadecimal numbers (Hex)
   • Binary-Coded Decimal (BCD)
   • ASCII
   • truth tables
   • boolean algebra
   Homework 1 due (in class). Homework 2 assigned, due Wed. January 26th.
4. Mon Jan 24.
   Notes
   Materials covered:
   • truth tables
   • boolean algebra
   • gates with multiple inputs
   • binary to decimal decoder
5. Wed Jan 26. Chapter 3. De Morgan's Laws.
   Notes
   Materials covered:
   • De Morgan's first law
   • De Morgan's second law
   • eXclusive OR with multiple inputs
   • controlled inverter
   • XNOR gate
   Homework 2 due (by email). Homework 3 assigned, due Wed. February 2nd.
6. Mon Jan 31. Chapter 5. Boolean Algebra and Karnaugh Maps.
   Notes
   Materials covered:
   • Boolean Relations
   • Duality Relations
   • Sum of Products
   • Algebraic Simplifications
   • Karnaugh Maps:
     • Pairs, Quads, Octets
     • Simplifications:
       • Overlapping
       • Redundant
       • Rolling
   • Don't care outputs
7. Wed Feb 2. Chapter 4. TTL circuits
   Notes
   Project 2 assigned, due Fri. February 19th.
   Homework 4 assigned, due Wed. February 9th.
   Materials covered:
   • TTL NAND, NOR gates
   • TTL Characteristics: voltages, currents, fanout, classes
   • buffers, schmitt triggers
   • multiplexers, arbitrary boolean functions
8. Mon Feb 7. Exam.
9. Wed Feb 9. Chapter 6. ALUs.
   Notes
   Homework 5 assigned, due Wed. February 16th.
   Materials covered:
   • binary addition
   • two's complement addition and subtraction
   • half adder
   • full adder
   • n-bit adder
   • carry-save adder
   • 2's complement adder-subtractor
10. Mon Feb 14. Chapter 7. Flip-flops.
    Notes
    Materials covered:
    • RS latches
    • level clocking
    • D latches
    • Edge-Triggered D flip flops
    • Edge-Triggered JK flip flops
    • JK master-slave flip flops
11. Wed Feb 16. Chapter 8. Registers.
    Notes
    Homework 6 assigned, due Wed. February 23rd.
    Materials covered:
    • Buffer registers
    • Shift registers
    • Controlled shift registers
    • Three-state registers
    • Buses
12. Wed Feb 23. Chapter 8. Counters. Chapter 9. Memories.
    Notes
    Project 3 assigned, due Monday March 13th.
    Homework 7 assigned, due Wed. March 1st.
    Materials covered:
    • Counters
      • ripple counters
      • synchronous counters
      • ring counters
      • other counters
    • Read-Only Memory
      • diode ROM
13. Mon Jan 28. Chapter 10. SAP-1 Architecture, instruction set.
    Notes
    Materials covered:
    • Read-Only Memory
      • diode ROM
      • ROM, PROM, EPROM, EEPROM
    • Random Access Memory
      • static
      • dynamic
      • memory cycle: { (bar(CE)) }, { (bar(WE)) }
      SAP-1
      • architecture
      • instruction set
14. Wed Mar 1. Chapter 10. SAP-1 Fetch and Execution, microprogram.
    Notes
    Homework 8 assigned, due Wed. March 8th.
    Materials covered:
    • fetch cycle
    • execution cycle
    • microprogram
    • controller implementation
15. Mon Mar 6. Chapter 11. SAP-2.
    Notes
    Materials covered:
    • architectural differences with SAP-1
    • bidirectional registers
    • instruction set
    • flags
16. Wed Mar 8. Exam, covering chapters 6-11.
17. Mon Mar 13. Chapter 12. SAP-3.
    Notes
    Homework 9 assigned, due Monday March 20th.
    Materials covered:
    • architectural differences with SAP-1, SAP-2
    • registers and move instructions
    • arithmetic instructions and carry flag
    • multi-precision addition and subtraction
    • rotate and compare
    • arithmetic, logic immediate instructions
18. Wed Mar 15. Chapter 12. SAP-3.
    Notes
    Materials covered:
    • rotate and compare
    • arithmetic, logic immediate instructions
    • jump instructions
    • 16-bit register pairing and 16-bit load, arithmetic
    • indirect instructions
    • stack instructions
    • CALL and conditional calls
19. Mon Mar 20. Processor design project.
    Notes
    Introduction and initial work.
    Homework 10 assigned, due Friday March 24th.
20. Wed Mar 22. Processor design project, continued.
21. Mon Apr 3. Computer Architecture, Chapter 13 and Chapter 15.
    Notes
    Materials covered:
    • Computer Architecture:
      • memory addressing
      • address and data bus
      • accumulators and registers
      • register word width
    • Microprocessor families
      • 6502
      • 6800
      • 8080/8085/Z80
      • x86
      • SPARC
      • Alpha
      • PowerPC
22. Wed Apr 5. Processor design project, presentations.
23. Mon Apr 10. Chapter 16.
    Notes
    Materials covered:
    • CPU control instructions
    • 6502 data transfer instructions
    • 6800 data transfer instructions
    • 8080 data transfer instructions
    • 8086 data transfer instructions
    • project evaluation and summary
24. Wed Apr 12. Chapter 17.
    Notes
    Project 4 assigned, due Monday April 24th.
    Materials covered:
    • pages
    • segments
    • simple addressing modes
    • 6502 addressing modes
    • 6800 addressing modes
    • 8080 addressing modes
    • 8086 addressing modes
25. Mon Apr 17. Chapter 18.
    Notes
    Materials covered:
    • Addition: carry, half-carry, overflow, sign, zero, parity flags
    • Subtraction: carry, half-carry, overflow (underflow), sign, zero, parity flags
    • other flags: interrupt
    • Multiplication: 6809, x86
26. Wed Apr 19. Exam.
27. Mon Apr 24. Chapter 21.
    Notes
    Materials covered:
    • Relative Addressing and Branches
    • Indirect Addressing
    • Indexed Addressing
    • 6502 addressing modes
    • 6800 addressing modes
    • 8085 addressing modes
    • x86 addressing modes
28. Wed Apr 26. Chapter 22.
    Notes
    Materials covered:
    • unconditional branches
    • conditional branches
    • compare and test
    • test and set
    • 6502 example
    • 6800 example
    • 8085 example
    • x86 example
29. Mon May 1. Chapter 23. Also, course evaluations (please bring a number 2 pencil).
    Notes
    Materials covered:
    • push
    • pop
    • call
    • return
    • parameters
    • continuations
    • interrupt
    • return from interrupt
    • class evaluations
30. Wed May 3. I/O device architecture (not in book).
    Notes
    Materials covered:
    • inputs and metastability
    • simple inputs and outputs
    • "smart" inputs and outputs
    • example: USART
    • example: ATM network card
31. Mon May 8, 12-2pm. Final examination. The final covers the entire course.
    Anyone who wants to take the final early can do so on Thursday, May 4th at 5pm. Contact the instructor at least 2 weeks in advance (no later than April 20th) if you are interested.

Grading and Cheating

• The homeworks (total is 50% of the grade)
• The exams (each of the exams is 10% of the grade)
• The final (20% of the grade)

A cumulative score of 90% will guarantee an A in the course, 80% a B, 60% a C, and 50% a D.

Exams can be rescheduled by prior agreement only. Contact the instructor at least 3 days in advance to reschedule an exam.

Homeworks and projects must be turned in by the date and time due. No credit is given for homeworks or projects that are late.

Except in group projects, everything you turn in must have been written by you personally and must reflect your own work.

Any cheating will result in a grade of F in the course. See also this policy (from a different ICS course) for more details.