TTL Circuits

• TTL NAND, NOR gates
• TTL Characteristics: voltages, currents, fanout, classes
• buffers, schmitt triggers
• multiplexers, arbitrary boolean functions

TTL NAND gate

• NAND gate is basic building block
• TTL logic uses multiple emitter
• totem-pole output: exactly one transistor is on at any given time
• Inverter: NAND with single input
• NOR: two parallel input stages

TTL Physical Characteristics

• Any input above 2V is high
• Any input below 0.8V is low
• A high output is at least 2.4V
• A low output is at most 0.4V
• input current is at most 40uA (high) or -1.6mA (low)
• output current is at least -400uA (high) or +16mA (low)
• fanout is 10

TTL classes

Buffers and Schmitt Triggers

• a buffer isolates two devices
• a typical gate acts as a buffer, but we call it a buffer only when it is designed for higher current (higher fanout)
• example: output currents -1.2mA (high) or 48 mA (low) can fan out to 30 TTL circuits or an LED
• Schmitt Trigger has histeresis, does not change state until well past the "midpoint"
• debouncer

Multiplexers

• in-class exercise: draw/design a multiplexer with:
  • 8 inputs, D0-D7
  • 3 control lines, A, B, C
  • one output Y, which reflects the value of the input corresponding to the numerical value of the control lines (e.g. A = 1, B = 0, C = 0 means 100 = 4, so Y should equal D4).
  • hint: think "sum of products"
• using multiplexers to implement arbitrary functions

Homework 4

• due Wednesday, February 9th, at 12noon
• email answers to ppathak@hawaii.edu
• page 62, problem 4-1
• page 78, problems 5-9, 5-10, 5-11, 5-12 (you don't need to email the maps, just the algebraic formulas)

Project Overview

• Microprocessor address lines
• Address Latch stores address
• RAM, ROM both connected to address bus, data bus
• selector selects which of RAM and ROM is active
• build circuit now, test address and data busses

Project 2

• Due Monday, February 14th
• wire everything according to the handout ("page 1") except the 74390 (counter), 8251 (USART), and the Maxim 232 (RS-232 circuit)
• do not place the 8085 (microprocessor) chip into the board -- we will simulate the operation of the microprocessor -- but go ahead and wire it, since it will be used in the next project
• get a program to display a "C" into your EPROM, or borrow an EPROM from the TA
• follow these instructions to read the value stored in byte at address 0014H:
  1. set A8-A12 and ALE (Address Latch Enable) low, A13-A15 so as to select the EPROM
  2. set A0-A7 to 14 (hex)
  3. set /RD and /WR high (inactive)
  4. check the input of the address latch -- it should equal A0-A7
  5. check that LE input of the latch is low, disabling the latch
  6. check that the /CS control of the EPROM is low, selecting it
  7. make ALE go high, then low
  8. verify that the outputs of the address latch equal A0-A7
  9. disconnect A0-A7 of the processor and verify that the outputs of the address latch have not changed
  10. check that A0-A7 of the EPROM are 0014H, and A8-A12 are grounded.
  11. check that the RAM A0-A12 are the same
  12. read the data outputs of the EPROM (use the meter) and verify that they are not valid logic levels
  13. make /RD low and verify that the data outputs are now DBH