Computer Architectures:
Today's Outline

• von Neumann Architecture
• Stack Architecture
• Accumulator Architecture
• Load/Store Architecture
• Announcements, Homeworks

von Neumann Machine

• "Stored Program" computer
• Addressable Memory
• ALU
• Program Counter

Algorithm

pc = 0;
do {
  instruction = memory[pc++];
  decode(instruction);
  fetchoperands();
  execute();
  storeresults();
} while (instruction != halt);

Different (von Neumann) architectures differ mainly in how they implement

fetchoperands()

execute()

storeresults()

Stack Architecture

Stack Machine Algorithm

• void fetchoperands(int howmany) {
    if (howmany > 0) op1 = *(sp--);
    if (howmany > 1) op2 = *(sp--);
  }
  

• void storeresults() {
    *(++sp) = result;
  }
  

• void literal(int value) {
    *(++sp) = value;
  }
  

Accumulator Machine

Accumulator Machine Algorithm

• void fetchoperands(int howmany) {
    if (howmany > 0) op1 = accumulator;
    if (howmany > 1) op2 = *(*(pc++));
  }
  

• void storeresults() {
    accumulator = result;
  }
  

• void load(int address) {
    accumulator = *address;
  }
  

• void store(int address) {
    *address = accumulator;
  }
  

Load-Store machines

Load-Store Machine Algorithm

• void fetchoperands(int howmany,
                      int* selector) {
    if (howmany > 0) op1 = r[selector[0]];
    if (howmany > 1) op2 = r[selector[1]];
  }
  

• void storeresults(int where) {
    r[where] = result;
  }
  

• void load(int address, int register) {
    r[register] = *address;
  }
  

• void store(int address, int register) {
    *address = r[register];
  }
  

Load-Store Machine Algorithm

pc = 0;
do {
  instruction = memory[pc++];
  if (ismemop(instruction)) {
    addr = memaddr(instruction);
    reg = regnum(instruction);
    if (isload(instruction))
      memory[addr] = r[reg];
    else
      r[reg] = memory[addr];
  } else {
    r1 = reg1num(instruction);
    r2 = reg2num(instruction);
    r3 = reg3num(instruction);
    r[r3] = execute(op(instruction),
                    r[r1], r[r2]);
} while (instruction != halt);

Load-Store machine

• if PC is one of the registers, branch is an assignment to the PC register
• if SP is one of the registers, PUSH is an increment followed by a store, POP a load followed by a decrement
• if a memory cycle is much longer than an instruction cycle, it is OK to require multiple instructions for one logical operation
• if all instructions are "regular", decoding can be faster
• still need conditional operations

Mailing List

• send mail to listserv@hawaii.edu
• no subject needed
• body of message should be:
  

  subscribe ICS312-L your-email-address
  

Homework

• Due Wed. September 2nd.
• Exercises 1.9 and 1.10
• Turn in: program, input, output
• Do alone
• The simpler form of exercise 1.10 is fine.