Kyle Berney

About

I am currently a lecturer in the Department of Information and Computer Sciences at the University of Hawaii at Manoa. During my graduate studies, my research spanned the areas of high-performance computing, parallel algorithms, cache-efficient algorithms, and general-purpose computing on graphics processing units (GPGPU). For more information, please see my academic C.V.

Contact

• berneyk@hawaii.edu

Education

• Ph.D. in Computer Science, University of Hawaii at Manoa, 2023

  • Dissertation: “Parallel Cache-Efficient Algorithms on GPUs”

  • Advisor: Nodari Sitchinava

• M.S. in Computer Science, University of Hawaii at Manoa, 2018

  • Thesis: “Beyond Binary Search: Parallel In-Place Construction of Implicit Search Tree Layouts”

  • Advisor: Nodari Sitchinava

• B.S. in Computer Science and Mathematics, University of Hawaii at Manoa, 2014

Teaching

• Fall 2025

  • ICS 311: Algorithms (2 sections)

  • ICS 332: Operating Systems (1 section)

• Summer 2025

  • ICS 141: Discrete Mathematics for Computer Science I (1 section)

  • ICS 241: Discrete Mathematics for Computer Science II (1 section)

  • ICS 311: Algorithms (1 section)

• Spring 2025

  • ICS 141: Discrete Mathematics for Computer Science I (3 sections)

  • ICS 311: Algorithms (1 section)

Research

• K. Berney and N. Sitchinava. “Eliminating GPU Bank Conflicts in GPU Mergesort”. In Proceedings of the 37th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), pages 158–170, 2025.

• H. Casanova, K. Berney, S. Chastel, R. Ferreira da Silva. “WfCommons: Data Collection and Runtime Experiments using Multiple Workflow Systems”. In 47th Annual Computers, Software, and Applications Conference (COMPSAC), pages 1870-1875, 2023.

• K. Berney, J. Iacono, B. Karsin, N. Sitchinava. “A Parallel Priority Queue with Fast Updates for GPU Architectures”. In CoRR, abs/1908.09378, 2023.

• K. Berney, H. Casanova, B. Karsin, N. Sitchinava. “Beyond Binary Search: Parallel In-Place Construction of Implicit Search Tree Layouts”. In IEEE Transactions on Computers, vol. 71, no. 5, pages 1104-1116, 2022.

• K. Berney and N. Sitchinava. “Engineering Worst-Case Inputs for Pairwise Merge Sort on GPUs”. In Proceedings of the 34th International Parallel and Distributed Processing Symposium (IPDPS), pages 1133-1142, 2020.

• K. Berney, H. Casanova, A. Higuchi, B. Karsin, N. Sitchinava. “Beyond Binary Search: Parallel In-Place Construction of Implicit Search Tree Layouts”. In Proceedings of the 32nd International Parallel and Distributed Processing Symposium (IPDPS), pages 1070-1079, 2018.