Today's plan

• paging
• virtual memory hardware
• minix memory management

Fast Paging

• the program computes an address and requests the corresponding virtual memory location
• the Memory Management Unit (MMU) is the hardware that translates the virtual address to a physical address by reading the page table from memory as needed
• the page table entry must contain the physical address of the page frame corresponding to the given virtual page, and additional bits to record:
  • whether the translation is valid (mapped)
  • whether the page may be written (and/or read or executed)
  • whether the page has been read (referenced) since this bit was cleared
  • whether the page has been written (modified, made dirty) since this bit was cleared
  • whether the page may be cached
• dirty pages will have to be written back to disk, whereas pages that already have a copy on disk but are not dirty can be discarded
• a small associative memory, the Translation Lookaside Buffer (TLB), caches translations (and other bits) for recently used pages
• some RISC computers require the OS to manage the TLB

Efficient Paging

• keeping a page table entry for every page of a process's virtual address space can be expensive
• one answer is to keep a top-level page table, and have pointers to second-level page tables for only those areas that are allocated
• another answer is to keep a table of physical-to-virtual address translations instead: this table takes up a fixed fraction of the memory (one entry per physical page), and is called an inverted page table
• this efficiency is important as virtual address spaces grow, e.g. to 64 bits
• inverted page tables must be searched (perhaps using hashing) when a new TLB translation is needed

Effective Paging

• paging only works well if most of the memory references are cache hits not requiring disk access or page table access
• most programs exhibit locality: most of the accesses are in a small group of pages (the working set of the program), and the most-recently used pages are the most likely to be accessed again
• it is easy to design programs that have no locality, and context switches also tend to destroy locality, but in general locality is common
• when in need of space, one or more pages must be selected for eviction from memory:
  • ideally, the page that will be not be referenced the longest should be evicted. This is optimal, but usually hard to compute
  • as an approximation, the page that was accessed least recently should be evicted (assuming past predicts future): Least Recently Used, LRU, also somewhat hard to compute
  • as an approximation to LRU, periodically mark all pages unused, then see if they are used. If not, they are candidates for eviction: Not Recently Used, NRU
  • NRU only works if the hardware keeps track of page accesses. If not, pages can be unmapped (but retained in memory), causing a page fault when accessed. The OS software can then mark the pages and load the mapping for the page again
  • to select a page in NRU, select the one that was loaded the longest ago: FIFO or second chance (because an accessed page gets a second chance to remain in memory)

Virtual Memory Hardware: Pentium

• support for pure segmentation, pure paging, or combinations of both
• pentium has six 16-bit segment registers, each containing a 13-bit segment selector, 1 bit to report whether it is a local or global segment selector, and two privilege bits
• segment registers are selected automatically during memory operations, e.g. the CS (code segment) for all program loads (IP/PC), e.g. next instruction, jump
• a segment selector is an index into a table of 4K 64-bit entries which include a 32-bit base field, a 20-bit limit field (with a bit which scales it by 2¹² to give up to 2³² limits), and other page-table kind of bits (in memory, type and protection, etc)
• program address ("offset" -- what most people call a virtual address) is added to the base (as long as it does not exceed the limit) to give a "linear address".
• if paging is disabled (as set by a bit in the CPU), the linear address is used as the physical address for the access
• otherwise, the top 10 bits of the linear address are used as an offset into a 1024-entry page directory, containing a pointer to a 1024-entry page table
• the next 10 bits of the linear address are used as an offset into the page table, the contents of which are added to the last 12 bits of the linear address to give the actual physical address
• this is only practical in the presence of locality, where the TLB can map dir and page combinations to physical addresses
• the segment computation (checking against limit, adding base) can be done within the CPU on every access, no need for memory accesses
• two protection bits contain the level of the segment -- accesses to other segments on the same level is fine, accesses to other segments on other level is more restricted

Operating System Protection Structure

• a program has only controlled access to inner rings of the system, for example through a call gate, similar to an interrupt vector table -- no option to jump into the middle of kernel code
• innermost ring might contain kernel, next ring the system calls, then the libraries, and finally the user code

Minix Memory Management

• no swapping, no paging
• memory manager allocates memory using first fit, never moves it or changes it
• memory manager keeps track of available memory and assigns it to processes (policy), kernel does the actual memory mapping (mechanism)
• memory manager allocates memory for fork (copy of the parent is the child) and for exec (memory is returned, new memory is allocated)
• two modes (program-dependent):
  • combined I and D, meaning the code and data are in the same segment, or
  • shared text, meaning the code is in a separate segment that can be used by multiple processes (e.g. parents and children)
• for the second case, exec searches to see if the required text is already loaded and can be shared

Minix Memory Manager

• main, on page 751, looks a lot like a task main loop
  (the reason for these similarities is that they are all event-driven, reactive systems)
• system calls include fork, exit, wait, brk, exec, system calls related to signals, and a few miscellaneous calls such as getpid and setuid
• memory manager has its own process table (p. 747), including:
  • the process segments (line 16308) -- all addresses must be a multiple of the click size (256, 0x100), and each segment has a physical address, a virtual address, and a length
  • various process and user IDs (lines 16311-16320)
  • sharing information for shared text
  • signal handling information
• to maximize portability, Minix does not use hardware segmentation to detect stack overflows: stack overflow is only detected if the program does an s/brk call and the stack has already overflowed

Minix Memory Allocation

• the hole table, defined on p. 784 (line 18823 and following), keeps track of available memory, again in clicks (allocated memory is kept track of in the memory manager's process table)
• the first-fit allocation algorithm is implemented on lines 18854-18871
• freeing memory is more complex because:
  • there may not be any available hole descriptors (128 are allocated, Minix does not store the hole descriptors in the holes themselves)
  • the free list is kept in sorted order, so the new block must be inserted in the correct position
  • the newly freed memory may be adjacent to one or two free blocks, and if so must be merged (lines 18902-18919 and merge on page 788)
• merging requires seeing if this block is adjacent to the one before, and if so, merging them, and then repeating the operation with the next block