ICS 331: Logic Design and Microprocessors

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Instructor: Edo Biagioni, esb@hawaii.edu. See here for office hours.

The TA for this course is Hongzhao Li, hongzhao@hawaii.edu. He is responsible for running the lab, and for grading labs in ICS 331L.

Goals: The goal of this course is to teach the basics of computer hardware, including machine architecture, microprocessors, and logic circuits. See here for more details.

Organization: This course has lectures, labs, exams, homeworks, and projects (the projects are for ICS 331L only).

This course meets MW 1:30-2:45 in POST 127. The lab is open MW 2:45-5:45, and F 10-4.

All students are required to join the course mailing list -- see here for details.

The instructor will assume that anything submitted for credit is not confidential and may be shared with the remainder of the class -- unless you clearly indicate otherwise. In particular, I will feel free to use anonymized student answers when posting solutions, unless you request otherwise.

Grading is based on exams, homeworks, and the final. Grading for ICS 331L is based on the projects. Homeworks and project must be turned in on time.

There is to be no cheating in this course.

The textbook is "Digital Computer Electronics", by Malvino and Brown (3rd edition). The textbook is available from the UH bookstore and online sellers.

Tentative Schedule

This schedule is loosely based on the same course taught in the Spring 2000.

• Mon Aug 25. Course overview and Introduction. Chapter 1.
  Notes
  Materials covered:
  • course overview
  • introduction to number systems
• Wed Aug 27. Chapter 1 continued.
  Notes
  Materials covered:
  • digital hardware basics:
    • resistors and LEDs
    • Ohm's law
    • transistors and switches
    • voltages as bits
    • magnetic cores
    • punched cards, magnetic tape
  • Hexadecimal numbers (Hex)
  • Binary-Coded Decimal (BCD)
  • ASCII
  Homework 1 assigned, due Wed. September 3rd.
  Project 1 assigned for ICS 331L, to be completed by Friday August 29th.
• Wed Sep 3. Chapter 2. Gates, boolean algebra.
  Notes
  Materials covered:
  • Register and Memory storage
  • truth tables
  • boolean algebra
  Homework 1 due (in class or by email). Homework 2 assigned, due Wed. September 10th.
• Mon Sep 8. Chapter 3. De Morgan's Laws.
  Notes
  Materials covered:
  • Gates with more than two inputs
  • De Morgan's first law
  • De Morgan's second law
  • eXclusive OR with multiple inputs
  • controlled inverter
  Project 2 assigned for ICS 331L, to be completed by Wednesday September 17th.
• Wed Sep 10. Chapter 5. Boolean Algebra and Karnaugh Maps.
  Notes
  • controlled inverter (repeat)
  • Boolean Relations
  • Duality Relations
  • Sum of Products
  • Algebraic Simplifications
  • Karnaugh Maps
  • Don't care outputs
  Homework 2 due (in class or by email). Homework 3 assigned, due Wed. September 17th.
• Mon Sep 15. Chapter 4. TTL circuits
  Notes
  • TTL NAND, NOR gates
  • TTL Characteristics: voltages, currents, fanout, classes
  • buffers, schmitt triggers
• Wed Sep 17. Chapter 4 continued. TTL circuits. Start chapter 6, ALUs.
  Notes
  • debouncer
  • multiplexers
  • arbitrary boolean functions
  • two's complement addition and subtraction
  • half adder
  • full adder
  • n-bit adder
  • carry-save adder
  • 2's complement adder-subtractor
  Homework 3 due (in class or by email). Homework 4 assigned, due Monday September 29th.
  Project 3 assigned, due Friday September 26th.
• Mon Sep 22. Exam.
• Wed Sep 24. Chapter 6. ALUs.
  Notes
  • half adder
  • full adder
  • n-bit adder
  • carry-save adder
  • 2's complement adder-subtractor
• Mon Sep 29. Chapter 7. Flip-flops.
  Notes
  • RS latches
  • level clocking
  • D latches
  • Edge-Triggered D flip flops
  • Edge-Triggered JK flip flops
  • JK master-slave flip flops
  Homework 4 due. Homework 5 assigned, due Monday October 6th.
• Wed Oct 1. Chapter 8. Registers.
  Notes
  • Buffer registers
  • Shift registers
  • Controlled shift registers
  • Three-state registers
  • Buses
  Project 4 assigned, due Friday October 10th.
• Mon Oct 6. Chapter 8, Counters.
  Notes
  • ripple counters
  • synchronous counters
  • ring counters
  • other counters
  Homework 5 due. Homework 6 assigned, due Monday October 13th.
• Wed Oct 8. Chapter 9, Memories.
  Notes
  • Read-Only Memory
  • Random Access Memory
• Mon Oct 13. Chapter 10. SAP-1.
  Notes
  • architecture
  • instruction set
  • fetch cycle
  • execution cycle
  • microprogram
  • controller implementation
  Homework 6 due. Homework 7 assigned, due Monday October 20th (due before the exam).
  List of parts for the kit for the remainder of the ICS 331L class.
• Wed Oct 15. SAP-1 microprogram and controller. Chapter 11, SAP-2.
  Notes
  • SAP-1: microprogram, controller implementation
  • SAP-2: architectural differences from SAP-1, bidirectional registers, instruction set, flags
• Mon Oct 20. Exam, chapters 6-10.
  Project 5 assigned, due Friday October 24th.
• Wed Oct 22. Chapter 11. SAP-1 instruction set.
  Notes
  • SAP-2 instruction set, flags
  • in-class discussion on improving the SAP-2
  Homework 8 assigned, due Wednesday October 29th
• Mon Oct 27. Chapter 11. microcode and SAP-2.
  Notes
  • SAP-1 microcode
  • SAP-2 flags
  • in-class discussion on improving the SAP-2
  Project 6 assigned, due Friday November 14th.
• Wed Oct 29. class cancelled due to building emergency. After bulding reopened, held study session for project 6 instead of a regular lecture.
• Mon Nov 3. Chapter 12. SAP-3.
  Notes
  • architectural differences with SAP-1, SAP-2
  • registers and move instructions
  • arithmetic instructions and carry flag
  • multi-precision addition and subtraction
  • rotate and compare
  • arithmetic, logic immediate instructions
  Homework 9 assigned, due Monday November 17th
• Wed Nov 5. Chapter 12. SAP-3. Computer Architecture, Chapter 13 and Chapter 15.
  Notes
  • context switches
  • CALL and conditional calls
  • Computer Architecture
  • Microprocessor families
• Mon Nov 10. Chapter 17, addressing modes, chapter 16, CPU control and data instructions.
  Notes
  • pages
  • segments
  • simple addressing modes
  • addressing modes for 6502, 6800, 8080, 8086
  • data transfer instructions for 6502, 6800, 8080
• Wed Nov 12. Chapter 18, Arithmetic Instructions.
  Notes
  • 8086 data transfer instructions
  • Addition
  • Subtraction
  • interrupt flag
  • Multiplication
• Mon Nov 17. Review for the exam.
  Notes
  • SAP-2
  • Microcode
  • SAP-3
  • Computer Architecture
  • Instructions: arithmetic, control, transfer
  • Memory addressing
  • interrupts and context switching
  Project 7 assigned, due Wednesday November 26th.
• Wed Nov 19. Exam, chapters 11-18.
• Mon Nov 24. Chapter 21, further addressing modes.
  Notes
  • Relative Addressing and Branches
  • Indirect Addressing
  • Indexed Addressing
  • addressing modes for 6502, 6800, 8085, x86
• Wed Nov 26. Chapter 22, branches.
  Notes
  • addressing modes for 6502, 6800, 8085, x86
  • branches
  • compare and test, test and set
  • code examples for 6502, 6800, 8085, x86
• Mon Dec 1.
  Notes
  • microcontrollers and applications
  • Basic Stamp
  • PIC
  • Project 8
  • PIC programming model
  Homework 10 assigned, due Monday Dec 8th before class.
  Project 8 assigned, due Friday December 5th. Last day to sign up for early final exam.
• Wed Dec 3. Chapter 23, methods, functions and interrupts. Also, course evaluations (please bring a number 2 pencil).
  Notes
  • stack operations
  • call and return
  • parameter passing
  • continuations
  • interrupts
  • class evaluations
• Mon Dec 8. I/O device architecture (not in book).
  Notes
  • inputs and metastability
  • simple inputs and outputs
  • "smart" inputs and outputs
  • example: USART
  • example: ATM network card
  Homework 10 due.
• Wed Dec 10. Course Review
  Notes
  • digital logic
  • combinatorial logic
  • sequential logic
  • memory
  • architecture
  • instruction sets
  • threads and interrupts
  • discussion
• Fri Dec 19, 2:15-4:15pm. Final examination. The final covers the entire course.

The final exam for this course is December 19th at 2:15pm in the regular classroom. The final is on the entire course.

You may take the final early (on Monday, December 15th, also at 2:15pm) if you contact the instructor by Monday, December 1st, or by special permission. The early final is in the instructor's office, POST 311B.