Outline: Error Checking
- ATM Conclusion
- Parity
- Checksum
- CRC
- LAN latency
ATM Switch Buffering
- Without buffers, can only handle exact permutations
- Input Buffering:
- Buffer is between input port and crossbar
- Head-of-line blocking: packets for a free
port blocked by packets at the "head of the line" for a congested port
- Output Buffering:
- No head-of-line blocking
- Buffer must be able to accept N cells for each cell sent
- Priority Buffers (low priority cells can't block high priority cells)
ATM Questions
- What does QoS give us that a few priorities wouldn't?
- Is connection-oriented the right model?
- How expensive is non-reordering of cells, and is it worth it?
- Why is ATM more expensive than Ethernet?
- ATM Scalability: (155Mb/s, 622Mb/s, 2.4Gb/s, 10Gb/s....) how
far can it go?
Error Checking
- Detect bit errors and burst errors.
- Think of an error pattern as being XOR'd with the original message.
- example:
| message = | 01010101 11110000 |
|
error = | 00010000 01000000 |
|
received data = | 01000101 10110000 |
|
|
Parity
- Add a bit to every byte:
- even parity, add the XOR of the bits
- odd parity add the XNOR.
- ASCII has seven bits, so adding a bit makes it into an even byte.
- Performance: Detects
- all single-bit errors
- about (n - 1)/n two-bit errors (in messages of n bytes)
- Also detects about x/2 burst errors of
length x bytes.
- Overhead is (1 / 7) =~ 14%.
Checksum
- 16-bit Internet checksum used for:
- IP header
- TCP (mandatory): header, pseudo-header, and data
- UDP (optional)
- other Internet protocols.
- Described in in RFC 1071
Checksum
- Transmission:
- The checksum is the negation
- of the 1's complement sum
- of all pairs of bytes (padded with a zero byte if needed).
- Checking:
- same computation, result must be 0xffff.
- Performance: Detects
- all single-bit errors
- almost all actual burst errors
- does not detect reorderings.
- for messages of n bytes, overhead is (2 / n)
- =~ 9.5% for n = 21, =~ 0.1% for n = 1500.
1's complement addition
- Like binary (2's complement) arithmetic, but
- when addition has a carry, the carry is added back in to the result
Example 1's complement addition
| 2's | (10's) | 1's | (10's) |
|
1100 + | -4 + | 1100 + | -3 + |
|
0101 = | 5 = | 0101 = | 5 = |
|
1 0001 | 1(17) | 0010 | 2
|
- Using a 32-bit value to compute the 16-bit checksum
- carries can be accumulated in the more significant half
- then added in at the end.
- The computation is commutative, associative, and byte-order independent.
(2's complement addition is not byte-order independent)
CRC
- polynomial remainder
- bit remainder
- shift registers
- used in:
- Ethernet
- FDDI
- ATM
- many other protocols.
CRC Performance
- Detect all all single-bit errors
- all double-bit errors
- all odd-numbered errors
- any burst of length less than k bits
- and reorderings.
- For messages of n bytes, overhead is (k / 8n) .
- e.g. the overhead is 6.7% for k = 32 and n = 60.
LAN latency
- time from availability of packet at network interface (API?)
to delivery at network interface
- sum of:
- queueing time Q (machine local queue)
- medium access time M (e.g. collision, FDDI)
- transmission time N/B (packet size / link rate)
- propagation time D/S (distance / speed of signal)
- t = Q + M + N/B + D/S